Jlink V9 Schematic -

More sophisticated clones—and possibly later official V9 revisions—use the , a 16-bit dual-supply translating transceiver. This IC offers several advantages: it consolidates level shifting into a single package, provides higher drive strength, and offers lower propagation delay. However, its fine-pitch SSOP or TSSOP package is more challenging to hand-solder, and the IC itself is more expensive than the smaller LVC series parts.

At the heart of the J-Link V9 schematic is the , an ARM Cortex-M4-based microcontroller running at clock speeds up to 120 MHz. jlink v9 schematic